1. Technical Field
Exemplary embodiments described herein relate to semiconductors and, more particularly, to integrated compound and elemental semiconductor substrates and devices.
2. Description of the Related Art
Compound semiconductors, particularly III-V semiconductors, are of interest for advanced complementary metal oxide semiconductor (CMOS) technology, due to their superior transport properties compared to silicon (Si). However, the superior transport only applies to electrons. In III-Vs, the hole mobility is only comparable or even degraded compared to elemental semiconductors, such as Si and Ge.
One method for combining III-V and group-IV materials is described by G. B. Gao and H. H. Hoang in U.S. Pat. No. 6,563,143, wherein a method of combining GaAs and Ge, for NFETs and PFETs, respectively, has been proposed. The combination of materials is particularly attractive because GaAs and Ge are lattice matched, and Ge has the highest hole mobility of any known semiconductor. However, the method proposed in Gao and Hoang has several problems. First of all, that method utilizes GaAs direct growth on a Si substrate, which produces poor quality GaAs with large defect densities arising from the roughly 4% lattice mismatch between GaAs and Si. Furthermore, any time a compound semiconductor is grown on an elemental semiconductor, anti-phase domains are a potential problem. The problem occurs at the atomic steps on the surface of the elemental semiconductor.
Referring to FIG. 1, when a compound semiconductor is grown, a sub-lattice inversion can occur at the step boundaries. These anti-phase domains can be electrically active, and could lead to device degradation or even failure. FIG. 1 shows an anti-phase boundary (APB). Though methods to remove anti-phase domains have been proposed, they involve complicated techniques such as growth on miscut substrates (S. Strite et al., Appl. Phys. Lett. vol. 56, 244 (1990)) that would be desirable to avoid.
M. Bulsara and E. A. Fitzgerald in U.S. Pat. No. 6,594,293 additionally describe the concept of bonding a III-V semiconductor layer to Si or SiO2 substrates to form III-V-on-insulator structures, but utilized III-V growth on Ge layers which, in turn, were formed on Si wafers using a compositional grading technique. This technique once again has the problem of anti-phase domains, and has the added problem that the starting material has a high defect density due to the lattice mismatch between the III-V layer and the original Si substrate.
Demonstrations of growing elemental semiconductors on a compound semiconductor have been shown (See, e.g., D. Eres et al., Appl. Phys. Lett. vol. 55, 858 (1989) and P. M. J. Maree et al., vol. 58, 3097 (1985)). However, a way of integrating the two materials onto a Si substrate has not been proposed.